IEEE Transactions on Circuits and Systems

The paper entitled “A Broadband Multi-Mode Compressive Sensing Current Sensor SoC in 0.16 μm CMOS,” by D. Bellasi, M. Crescentini, D. Cristaudo, A. Romani, M. Tartagni and L. Benini,has been published in the IEEE Transactions on Circuits and Systems Journal!

The paper presents a compressive sensing (CS) current sensor system-on-chip (SoC) designed and fabricated in STM 0.16μm Bipolar-CMOS-DMOS technology. The SoC is capable of measuring currents with amplitudes of up to 10 A peak with a sensing bandwidth of 1 MHz. Two broadband current sensing cores, each consisting of a Hall-effect probe, an AFE, and a 2 MS/s 9-bit ADC, are monolithically integrated together with a digital multi-mode compressive sensing encoder (DCSE) for data-rate reduction. The paper focuses on the evaluation of CS as data compression codec for current sensing applications and on the details of the DCSE architecture designed for general purpose use. The paper introduces multi-block decoding that is a decoding modality to improve the reconstruction quality of “off-grid sparse” signals commonly occurring in practice. Moreover, this paper providew measurements of both the compression performance and power consumption of the SoC employed in two exemplary real-world applications; namely, sparse current sensing, and electrical appliance detection for non-intrusive load monitoring based on compressive measurements.

SHARE ON