International Journal of Circuit Theory and Applications
The paper entitled “Variability‐aware design of a bandgap voltage reference with 0.18% standard deviation and 68 nW power consumption”, by F. Cucchi S. Di Pascoli and G. Iannaccone has been published in the International Journal of Circuit Theory and Applications!
This paper presents a design approach based on a reassessment of design priorities to obtain robust circuits with respect to process variability. It shows that if variability is addressed as one of the main issues in circuit design, and make it inform our very first design choices, dispersion of circuit characteristics can be significantly reduced without degrading of the other performance figures. The variability‐aware approach is applied to the design of a nanopower reference voltage generator in 0.18‐μm CMOS technology. The result is a BJT‐based topology, which provides a reference voltage of about 241 mV from a 1 V supply voltage. Measurements on 20 samples from a single batch show that the reference voltage exhibits a relative standard deviation of 0.18%, while consuming only 68.3 nW. This is comparable with the performance of references that are either trimmed or consume much more power. This reduced process sensitivity comes at the cost of a significant increase of die area (0.28 mm2).