International Journal of Electronics and Communications

The paper entitled “An Ultra Low-Voltage Rail-to-Rail Comparator for On-Chip Energy Harvesters”, by Lukas Nagy, Viera Stopjakova, Daniel Arbet, Miroslav Potocny, Martin Kovac has been published at the International Journal of Electronics and Communications!

This paper presents a performance evaluation of an ultra low-voltage non-clocked voltage comparator, designed and fabricated in a standard twin-well 130 nm CMOS technology. The comparator can handle the input voltage within rail-to-rail range and is capable of working in temperature range from -20 to 85 °C and with power supply voltage as low as 0.4 V. The comparator is intended to be employed in an on-chip energy harvester system with minimized quiescent current consumption. So-called gm/ID low-voltage design methodology in combination with the bulk-driven design approach have been selected in the circuit topology. The measurement results obtained from fabricated prototype chips, including static and dynamic parameters, are presented and discussed as well. An excellent correlation between simulations and the measured bench data has been observed with the supply voltage value of 0.6 V, while slightly less tight correlation has been reported for VDD = 0.4 V. Anyhow, simulations and measurements both confirm that the presented silicon-proven comparator topology is capable of reliable operation with power consumption within nW range.

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